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?1 CXB1577Q e96z24-ps post-amplifier for optical fiber communication receiver description the CXB1577Q achieves the 2r optical-fiber communication receiver functions (reshaping and regenerating) on a single chip. this ic is equipped with the signal detection function, which is used to enable ttl/ecl outputs. also, the output disable function performs the output shutdown. 3.3v/5.0v can be used for the supply voltage. features output disable function (ttl input) signal detection function (ttl/ecl output) supply voltage supports both 3.3v/5.0v applications sonet/sdh: 622.08mbps fibre channel: 531.25mbps : 1.062gbps gigabit-ethernet: 1.25gbps absolute maximum ratings supply voltage v cc ?v ee ?.3 to +7 v storage temperature tstg ?5 to +150 ? input voltage difference v d ?v d vdif 0 to +2 v sw input voltage vi v ee to v cc v ecl output current i o q/sd-ecl ?0 to 0 ma ttl output current (high level) i oh sd-ttl ?0 to 0 ma ttl output current (low level) i ol sd-ttl 0 to 20 ma recommended operating conditions supply voltage v cc ?v ee 3.3 0.2/5 0.25 v termination voltage (for data) v cc ?vt d 1.8 to 2.2 v termination voltage (for alarm 1,alarm 2) vta v ee v termination resistance (for data) rt d 46 to 56 termination resistance (for alarm 1) rta1 240 to 300 termination resistance (for alarm 2) rta2 460 to 560 operating temperature ta ?0 to +85 ? structure bipolar silicon monolithic ic sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 40 pin qfp (plastic)
? 2 CXB1577Q block diagram and pin configuration v e e 4 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 1 n . c . v e e 3 o d i s s w v c 2 n . c . n . c . v e e 1 v e e 2 n . c . n . c . v c 3 c a p 3 c a p 2 v e e 2 v e e i d n u p n . c . v c c 3 q b q v c 1 s d b - e c l s d b - t t l s d - t t l v c c 4 t m v c c 1 n . c . c a p 1 b c a p 1 d v c c 2 v c c 2 v c 0 d b v e e 1 s d - e c l p e a k h o l d p e a k h o l d d v
? 3 CXB1577Q pin description pin no. 1 v ee 3 ?.3v / ?v negative power supply for ecl output buffer. switches the identification maximum voltage amplitude. high voltage when open; the identification maximum voltage amplitude becomes 40mvp-p. low voltage when connected to v ee ; the amplitude becomes 20mvp-p. 2 odis 0v (open) or ?.3v / ?v 3 sw 0v (open) or ?.3v / ?v switches 3.3v/5v. short this pin to vcc for 3.3v between vcc and v ee . leave this pin open for 5v between vcc and v ee . no connected. negative power supply for digital block. negative power supply for analog block. chip temperature monitor. 4 v cc 2 0v 6 vc2 0v / ?.7v (open) 7 n.c. 8 9 10 5 v ee 2 ?.3v / ?v v ee 1 ?.3v / ?v 11 tm ?.8v / 3.5v controls the output shutdown function. high voltage when open; the q output is fixed to low. low voltage when connected to v ee ; the d input results in the q output with ecl level. ttl level is also available. symbol typical pin voltage dc ac equivalent circuit description v c c 2 v e e 2 4 0 k 6 0 k 3 2 v c c 2 v e e 2 v r e f 1 0 k 1 0 k 3 0 0 5 v c c 2 v e e 2 6 k 2 k positive power supply for digital block. 1 0 1 1 v e e 1
? 4 CXB1577Q 12 13 14 15 16 17 18 19 20 21 22 23 24 25 v cc 1 vc0 n.c. cap1b cap1 db d v ee 1 v cc 2 n.c. up dn v ee i v ee 2 0v ?.9v to ?.7v ?.9v to ?.7v positive power supply for analog block. no connected. switches 3.3v/5v. short this pin to vcc for 3.3v between vcc and v ee . leave this pin open for 5v between vcc and v ee . pins 15 and 16 connect a capacitor which determines the cut-off frequency for dc feedback block. pins 17 and 18 are input pins for limiting amplifier block. input the signal with ac coupled. dc ac v c c 3 v e e 3 6 k 2 k 1 3 negative power supply for analog block. positive power supply for digital block. no connected. connects a resistor for alarm level setting. default voltage can be generated without an external resistor by shorting the v ee i pin to v ee . generates the default voltage between up and down. the voltage (8.0mv for input conversion) can be generated between up and down (pins 22 and 23) as alarm setting level by connecting this pin to v ee . ?.3v ?.3v ?.3v /?v 0v ?.3v /?v ?.3v /?v 1 6 1 5 1 k 1 8 1 7 1 k v c c 1 v e e 1 2 0 0 7 . 5 k 1 0 0 p 2 0 0 7 . 5 k pin no. symbol typical pin voltage equivalent circuit description 2 3 2 4 v c c 2 v e e 2 1 0 0 2 2 9 8 6 1 0 0 1 4 0 . 9 1 4 0 . 9 v c s s w s w negative power supply for digital block. 0v / ?.7v (open)
? 5 CXB1577Q 32 dc ac 26 cap2 ?.8v connects a peak hold circuit capacitor for alarm block. 470pf should be connected to vcc each. cap2 pin connects a peak hold capacitor for alarm level setting block. cap3 pin connects a peak hold capacitor for limiting amplifier signal. 2 6 v c c 2 v e e 2 8 0 2 0 0 5 a 1 0 p 27 cap3 ?.8v 28 29 30 31 vc3 v ee 4 n.c. v cc 4 0v / ?.7v (open) ?.3v /?v 0v switches 3.3v/5v. short this pin to vcc for 3.3v between vcc and v ee . leave this pin open for 5v between vcc and v ee . v c c 2 v e e 2 8 0 2 0 0 5 a 1 0 p 2 7 v c c 3 v e e 3 6 k 2 k 2 8 vc1 0v ?.7v (open) switches 3.3v/5v. short this pin to vcc for 3.3v between vcc and v ee . leave this pin open for 5v between vcc and v ee . v c c 3 v e e 3 6 k 2 k 3 2 pin no. symbol typical pin voltage equivalent circuit description negative power supply for ttl output buffer. no connected. positive power supply for ttl output buffer.
? 6 CXB1577Q dc ac 33 sd-ttl v ee or v ee + 3v alarm signal ttl level output. v c c 4 v e e 4 3 3 4 0 k 34 sdb-ttl v ee or v ee + 3v 35 36 sd-ecl sdb-ecl ?.9v or ?.7v ?.9v or ?.7v alarm signal ecl level output. terminate this pin in 510 to v ee at v ee = 5v; in 270 to v ee at v ee = 3.3v. v c c 4 v e e 4 4 0 k 3 4 3 6 3 5 v c c 3 v e e 3 pin no. symbol typical pin voltage equivalent circuit description alarm signal ttl level output.
? 7 CXB1577Q dc ac 37 q ?.9v or ?.7v data signal output. terminates this pin in 50 to vtt = vcc?v. v c c 3 v e e 3 3 8 3 7 38 qb ?.9v or ?.7v 39 40 v cc 3 n.c. 0v pin no. symbol typical pin voltage equivalent circuit description positive power supply for ecl output buffer. no connected.
? 8 CXB1577Q supply current q/qb high output voltage q/qb low output voltage sd-ecl/sdb-ecl high output voltage sd-ecl/sdb-ecl low output voltage sd-ttl/sdb-ttl high output voltage 1 sd-ttl/sdb-ttl high output voltage 2 sd-ttl/sdb-ttl low output voltage sw high input voltage sw low input voltage sw high input current sw low input current odis high input voltage odis low input voltage odis high input current odis low input current d/db input resistance electrical characteristics dc characteristics item i ee voh vol voh-e vol-e voh-t1 voh-t2 vol-t vihsw vilsw iihsw iilsw vihod vilod iihod iilod rin 50 to vtt ta = 0 to +85 c when vcc ?v ee = 5.0v, 510 to v ee ; when vcc ?v ee = 3.3v, 270 to v ee ta = 0 to +85 c ioh = ?.4ma, v cc ?v ee = 3.3v, ta = 0 to +85 c ioh = ?.4ma, v cc ?v ee = 5v, ta = 0 to +85 c iol = 2ma ta = 0 to +85 c at sw pin open: high at odis pin open: high ?4 ?100 ?860 ?100 ?890 v ee + 2.2 v ee + 2.4 v cc ?0.5 v ee ?00 v ee + 2.0 v ee ?00 765 ?1 1020 ?4 ?60 ?620 ?60 ?650 v ee + 0.5 v cc v ee + 0.5 10 v cc + 0.5 v ee + 0.8 20 1275 ma mv v a v a symbol min. typ. max. unit conditions v cc = gnd, v ee = ?v 5%, ta = ?0 to +85 c, vc0 to vc3 = open, or v cc = gnd, v ee = ?.3v 5%, ta = ?0 to +85 c, vc0 to vc3 = gnd
? 9 CXB1577Q ac characteristics * 1 vup ?vdown = 100mv, vin = 100mvp-p (single ended), sw pin: high, peak hold capacitance (cap2, cap3 pins) of 470pf, connect v ee i to v ee . * 2 vup ?vdown = 100mv, vin = 1vp-p (single ended), sw pin: high, peak hold capacitance (cap2, cap3 pins) of 470pf, connect v ee i to v ee . * 3 vin = 50mvp-p (single ended), sw pin: low, peak hold capacitance of 470pf, connect v ee i to v ee . * 4 vin = 1vp-p (single ended), sw pin: low, peak hold capacitance of 470pf, connect v ee i to v ee . maximum input voltage amplitude amplifier gain (excluding the output buffer) identification maximum voltage amplitude of alarm level sd/sdb hysteresis width alarm setting level for default q/qb rise time q/qb fall time sd-ttl/sdb-ttl rise time sd-ttl/sdb-ttl fall time sd-ecl/sdb-ecl rise time sd-ecl/sdb-ecl fall time propagation delay time sd response assert time sd response deassert time sd response assert time for alarm level default sd response deassert time for alarm level default item vmax gl vmaxa1 vmaxa2 ? p1 ? p2 vdef trq tfq trsdt tfsdt trsde tfsde tpd tas tdas tasd tdasd single-ended input sw pad: low, single-ended input sw pad: open high, single-ended input sw pin: low, at default alarm level sw pin: open high, at default alarm level up/down pin: open, v ee i = v ee , differential voltage input 20% to 80% 50 to vtt v ee + 0.8v to v ee + 2.0v c l = 10pf 20% to 80% when vcc ?v ee = 5.0v, 510 to v ee , when vcc ?v ee = 3.3v, 270 to v ee * 1 * 2 * 3 * 4 1600 52 20 40 3 3 7.0 0.4 0 2.3 0 2.3 6 6 8.4 230 230 7 7 9.7 350 350 10 10 1.6 1.6 1.9 100 100 100 100 mvp-p db mvp-p db mv ps ns s symbol min. typ. max. unit conditions v cc = gnd, v ee = ?v 5%, ta = ?0 to +85 c, vc0 to vc3 = open, or v cc = gnd, v ee = ?.3v 5%, ta = ?0 to +85 c, vc0 to vc3 = gnd
? 10 CXB1577Q dc electrical characteristics measurement circuit 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 1 n . c . v e e 3 o d i s s w v c 2 n . c . n . c . v e e 1 v e e 2 n . c . n . c . v e e 4 v c 3 c a p 3 c a p 2 v e e 2 v e e i d n u p n . c . v c c 3 q b q v c 1 s d b - e c l s d b - t t l s d - t t l v c c 4 t m v c c 1 n . c . c a p 1 b c a p 1 d v c c 2 v c c 2 v c 0 d b v e e 1 s d - e c l p e a k h o l d p e a k h o l d d v c 3 c 3 c 1 c 1 c 2 v d v e e 5 . 0 v / 3 . 3 v v s w v o d i s 5 1 0 5 1 5 1 2 7 0 5 1 0 2 7 0 v t t 2 v * w h e n v e e = 5 . 0 v : v c 0 t o v c 3 = o p e n w h e n v e e = 3 . 3 v : v c 0 t o v c 3 = v c c
? 11 CXB1577Q ac electrical characteristics measurement circuit 0 . 0 4 7 f 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 1 n . c . v e e 3 o d i s s w v c 2 n . c . n . c . v e e 1 v e e 2 n . c . n . c . v e e 4 v c 3 c a p 3 c a p 2 v e e 2 v e e i d n u p n . c . v c c 3 q b q v c 1 s d b - e c l s d b - t t l s d - t t l v c c 4 t m v c c 1 n . c . c a p 1 b c a p 1 d v c c 2 v c c 2 v c 0 d b v e e 1 s d - e c l p e a k h o l d p e a k h o l d d v 4 7 0 p 4 7 0 p 0 . 0 4 7 f 1 f v c c + 2 v * w h e n v e e = 3 . 0 v : v c 0 t o v c 3 = o p e n w h e n v e e = 1 . 3 v : v c 0 t o v c 3 = v c c z 0 = 5 0 v e e 3 v / 1 . 3 v o s c i l l o s c o p e 5 0 w i n p u t z 0 = 5 0 z 0 = 5 0 z 0 = 5 0 o s c i l l o s c o p e h i - z i n p u t r e x 1
? 12 CXB1577Q application circuit r e x 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 1 n . c . v e e 3 o d i s s w v c 2 n . c . n . c . v e e 1 v e e 2 n . c . n . c . v e e 4 v c 3 c a p 3 c a p 2 v e e 2 v e e i d n u p n . c . v c c 3 q b q v c 1 s d b - e c l s d b - t t l s d - t t l v c c 4 t m v c c 1 n . c . c a p 1 b c a p 1 d v c c 2 v c c 2 v c 0 d b v e e 1 s d - e c l p e a k h o l d p e a k h o l d d v 4 7 0 p 5 1 w 0 . 0 4 7 f v i n * w h e n v e e = 3 . 3 v : v c 0 t o v c 3 = v c c w h e n v e e = 5 . 0 v : v c 0 t o v c 3 = o p e n 4 7 0 p v t t 5 1 w s i g n a l g e n e r a t o r 5 1 w v t t 1 f 0 . 0 4 7 f 5 1 w v t t v e e t t l i n p u t v t t 2 . 0 v 5 1 w 5 1 w e c l o u t p u t e c l o u t p u t t t l o u t p u t v e e application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
? 13 CXB1577Q r 1 1 5 1 6 1 7 r 1 r 2 r 2 t o i c i n t e r i o r c 1 c 1 d c 2 1 8 fig. 1 f e e d b a c k f r e q u e n c y r e s p o n s e f 2 a m p l i f i e r f r e q u e n c y r e s p o n s e f 1 f r e q u e n c y g a i n fig. 2 notes on operation 1. limiting amplifier block the limiting amplifier block is equipped with the auto-offset canceler circuit. when external capacitors c1 and c2 are connected as shown in fig. 1, the dc bias is set automatically in this block. external capacitor c1 and ic internal resistor r1 determine the low input cut-off frequency f2 as shown in fig. 2. similarly, external capacitor c2 and ic internal resistor r2 determine the high cut-off frequency f1 for dc bias feedback. since peaking characteristics may occur in the low frequency area of the amplifier gain characteristics depending on the f1/f2 combination, set the c1 and c2 values so as to avoid the occurrence of peaking characteristics. the target values of r1 and r2 and the typical values of c1 and c2 are as indicated below. when a single-ended input is used, provide ac grounding by connecting pin 17 to a capacitor which has the same capacitance as capacitor c1. r1 (internal): 1k r2 (internal): 7.5k f2: 3.4khz f1: 21hz c1 (external): 0.047 f c2 (external): 1 f
? 14 CXB1577Q 2. alarm block in order to operate the alarm block, give the voltage difference between pins 22 and 23 to set an alarm level and connect the peak hold capacitor c3 shown in fig. 3. this ic has two setting methods of alarm level; one is to connect pin 24 to v ee and leave pins 22 and 23 open to set an alarm level default value (8mv for input conversion). the other is to connect pin 24 to v ee and set a desired alarm level using the external resistors r ex1 , r ex2 and r ex3 shown in fig. 3. connect r ex1 between pins 22 and 23 or connect r ex3 between pin 23 and vcc when less alarm level is desired to be set than its default value; connect r ex2 between pin 22 and vcc when more alarm level is desired to be set than its default value. however, the pin 22 voltage must be higher than that of pin 23. this ic also features two-level setting of identification maximum voltage amplitude. the amplitude is set to 40 mvp-p when pin 3 is left open (high level) and it is set to 20mvp-p when pin 3 is low level. therefore, the noise margin can be increased by setting pin 3 to low level when the small signal is input. the relation of input voltage and peak hold output voltage is shown in fig. 5. in the relation between the alarm setting level and hysteresis width, the hysteresis width is designed to maintain a constant gain (design target value: 6db) as shown in fig. 4. this ic is designed to externally have the capacitor c3, and the c3 value should be set so as to obtain desired assert time and deassert time settings for the alarm signal. the electrical characteristics for the sd response assert and deassert times are guaranteed only when the waveforms are input as shown in the timing chart of fig. 6. r ex1 : 100 (when the alarm level is set to 4mv for input conversion.) r ex2 : 8k (when the alarm level is set to 10mv for input conversion.) r ex3 : 4k (when the alarm level is set to 4mv for input conversion.) c3: 470pf the table below shows the alarm logic. the table below shows the output disable function logic. v c c c 3 v c c 3 2 3 2 4 2 6 2 7 c 3 p e a k h o l d s d - t t l s d - e c l s d b - e c l s d b - t t l p e a k h o l d d v 1 0 p 1 0 p v c c a v c c a f r o m l i m i t i n g a m p l i f i e r v c c r e x 3 r e x 1 r e x 2 v c c v e e 2 2 2 3 2 4 r a 1 9 8 6 v c c a i c i n t e r i o r d n v e e i i c e x t e r i o r v c s 2 2 u p r a 2 b 1 4 1 r a 2 a 1 4 1 r a 1 , r a 2 a a n d r a 2 b v a l u e s a r e t y p i c a l v a l u e s . optical signal input state signal input signal interruption low level high level sd high level low level sd optical signal input state odis: open high odis: low fixed high data q fixed low data q fig. 3
? 15 CXB1577Q i n p u t e l e c t r i c a l s i g n a l a m p l i t u d e s d o u t p u t v a s v d a s 3 d b 3 d b a l a r m s e t t i n g i n p u t l e v e l h y s t e r e s i s l a r g e s m a l l h i g h l e v e l l o w l e v e l v d a s ? d e a s s e r t l e v e l v a s ? a s s e r t l e v e l fig. 4 i n p u t v o l t a g e [ m v p - p ] p e a k h o l d o u t p u t v o l t a g e s w ? l o w 0 2 0 4 0 s w ? o p e n h i g h fig. 5 d e a s s e r t t i m e h y s t e r e s i s w i d t h a l a r m s e t t i n g l e v e l d a t a i n p u t ( d ) d a t a o u t p u t ( q ) a s s e r t t i m e a l a r m o u t p u t ( s d ) fig. 6
? 16 CXB1577Q 1 . q / q b o u t p u t w a v e f o r m q q b c h . 1 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , c h . 2 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , t i m e b a s e = 5 0 0 p s / d i v v c c = g n d v e e = 3 . 3 v v t t = 2 v t a = 2 7 c d = 6 2 2 m b p s v i n = 1 0 m v p - p s i n g l e i n p u t p a t t e r n : p r b s 2 2 3 - 1 q / q b = 5 0 w t o v t t q q b c h . 1 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , c h . 2 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , t i m e b a s e = 2 0 0 p s / d i v v c c = g n d v e e = 3 . 3 v v t t = 2 v t a = 2 7 c d = 1 . 2 5 g b p s v i n = 5 m v p - p s i n g l e i n p u t p a t t e r n : p r b s 2 2 3 - 1 q / q b = 5 0 w t o v t t q q b c h . 1 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , c h . 2 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , t i m e b a s e = 5 0 0 p s / d i v v c c = g n d v e e = 3 . 3 v v t t = 2 v t a = 2 7 c d = 6 2 2 m b p s v i n = 5 m v p - p s i n g l e i n p u t p a t t e r n : p r b s 2 2 3 - 1 q / q b = 5 0 w t o v t t f i g . 7 f i g . 8 f i g . 9 example of representative characteristics
? 17 CXB1577Q 2 . b i t e r r o r r a t e 3 . a l a r m l e v e l 6 2 2 m b p s 1 . 0 g b p s 1 . 2 5 g b p s b i t e r r o r r a t e v s . d a t a i n p u t l e v e l d a t a i n p u t l e v e l [ m v p - p ] 1 . 5 2 2 . 5 3 3 . 5 4 4 . 5 1 0 1 0 1 0 9 1 0 8 1 0 7 1 0 6 1 0 5 1 0 4 1 0 3 v c c = g n d v e e = 3 . 3 v v t t = 2 v t a = 2 7 c s i n g l e i n p u t p a t t e r n : p r b s 2 2 3 - 1 q / q b = 5 0 w t o v t t b i t e r r o r r a t e a l a r m l e v e l t e m p e r a t u r e t a [ c ] 4 0 2 . 0 2 0 8 0 a l a r m l e v e l [ m v ] 2 . 5 3 . 0 3 . 5 4 . 0 4 . 5 5 . 0 6 . 0 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v u p - d o w n = 2 0 0 w ( r e x 1 ) 2 0 4 0 0 6 0 5 . 5 a l a r m l e v e l v s . r e x 1 u p - d o w n ( r e x 1 ) [ w ] 1 0 2 2 1 0 3 1 0 4 a l a r m l e v e l [ m v ] 3 4 5 6 7 8 9 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v t a = 2 7 c d i f f e r e n t i a l i n p u t q q b c h . 1 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , c h . 2 = 4 0 0 m v / d i v o f f s e t = 1 3 3 0 m v , t i m e b a s e = 2 0 0 p s / d i v v c c = g n d v e e = 3 . 3 v v t t = 2 v t a = 2 7 c d = 1 . 2 5 g b p s v i n = 1 0 m v p - p s i n g l e i n p u t p a t t e r n : p r b s 2 2 3 - 1 q / q b = 5 0 w t o v t t f i g . 1 0 f i g . 1 1 f i g . 1 2 f i g . 1 3
? 18 CXB1577Q a l a r m l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 2 . 0 f i g . 1 4 3 . 3 3 . 6 a l a r m l e v e l [ m v ] 2 . 5 3 . 0 3 . 5 4 . 0 4 . 5 5 . 0 6 . 0 s w = h s w = l f i n = 1 0 0 m b p s t a = 2 7 c u p - d o w n = 2 0 0 w ( r e x 1 ) 3 . 1 3 . 4 3 . 2 3 . 5 5 . 5 a l a r m l e v e l t e m p e r a t u r e t a [ c ] 4 0 1 1 . 0 2 0 8 0 a l a r m l e v e l [ m v ] 1 1 . 5 1 2 . 0 1 2 . 5 1 3 . 0 1 3 . 5 1 4 . 0 1 5 . 0 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v v c c - u p = 5 k w ( r e x 2 ) 2 0 4 0 0 6 0 1 4 . 5 a l a r m l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 1 1 . 0 3 . 3 3 . 6 a l a r m l e v e l [ m v ] 1 1 . 5 1 2 . 0 1 2 . 5 1 2 . 0 1 3 . 5 1 4 . 0 1 5 . 0 s w = h s w = l f i n = 1 0 0 m b p s t a = 2 7 c v c c - u p = 5 k w ( r e x 2 ) 3 . 1 3 . 4 3 . 2 3 . 5 1 4 . 5 a l a r m l e v e l v s . r e x 2 v c c - u p ( r e x 2 ) [ w ] 1 0 3 8 1 0 4 1 0 5 a l a r m l e v e l [ m v ] 1 0 1 1 1 2 1 3 1 4 1 5 1 6 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v t a = 2 7 c d i f f e r e n t i a l i n p u t 9 a l a r m l e v e l t e m p e r a t u r e t a [ c ] 4 0 2 . 5 2 0 8 0 a l a r m l e v e l [ m v ] 3 . 0 3 . 5 4 . 0 4 . 5 5 . 0 6 . 0 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v v c c - d o w n = 3 k w ( r e x 3 ) 2 0 4 0 0 6 0 5 . 5 a l a r m l e v e l v s . r e x 3 v c c - d o w n ( r e x 3 ) [ w ] 1 0 3 3 1 0 4 1 0 5 a l a r m l e v e l [ m v ] 4 5 6 7 8 9 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v t a = 2 7 c d i f f e r e n t i a l i n p u t f i g . 1 5 f i g . 1 6 f i g . 1 7 f i g . 1 8 f i g . 1 9
? 19 CXB1577Q a l a r m l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 2 . 0 3 . 3 3 . 6 a l a r m l e v e l [ m v ] 2 . 5 3 . 0 3 . 5 4 . 0 4 . 5 5 . 0 6 . 0 s w = h s w = l f i n = 1 0 0 m b p s t a = 2 7 c v c c - d o w n = 3 k w ( r e x 3 ) 3 . 1 3 . 4 3 . 2 3 . 5 5 . 5 h y t e r e s i s w i d t h s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 0 . 0 3 . 3 3 . 6 h y s [ d b ] 1 . 0 2 . 0 3 . 0 4 . 0 5 . 0 6 . 0 8 . 0 s w = h s w = l f i n = 1 0 0 m b p s t a = 2 7 c u p , d o w n = o p e n v e e i = v e e 3 . 1 3 . 4 3 . 2 3 . 5 7 . 0 h y s t e r e s i s w i d t h v s . a l a r m l e v e l a l a r m l e v e l [ m v ] 2 . 0 0 . 0 8 . 0 1 4 . 0 h y s [ d b ] 1 . 0 2 . 0 3 . 0 4 . 0 5 . 0 6 . 0 8 . 0 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v t a = 2 7 c 4 . 0 1 0 . 0 6 . 0 1 2 . 0 7 . 0 h y s t e r e s i s w i d t h t e m p e r a t u r e t a [ c ] 4 0 0 . 0 2 0 8 0 h y s [ d b ] 2 . 0 3 . 0 4 . 0 5 . 0 6 . 0 8 . 0 s w = h s w = l f i n = 1 0 0 m b p s v c c v e e = 3 . 3 v u p , d o w n = o p e n v e e i = v e e 2 0 4 0 0 6 0 7 . 0 1 . 0 a l a r m l e v e l v s . d a t a r a t e f i n [ m b p s ] 2 0 0 2 8 0 0 1 4 0 0 a l a r m l e v e l [ m v ] 6 8 1 0 1 2 1 4 1 6 s w = h s w = l v c c v e e = 3 . 3 v t a = 2 7 c u p , d o w n = o p e n v e e i = v e e 4 0 0 1 0 0 0 6 0 0 1 2 0 0 4 0 h y s t e r e s i s w i d t h v s . d a t a r a t e f i n [ m b p s ] 2 0 0 0 8 0 0 1 4 0 0 h y s [ d b ] 4 6 8 1 0 1 2 s w = h s w = l v c c v e e = 3 . 3 v t a = 2 7 c u p , d o w n = o p e n v e e i = v e e 4 0 0 1 0 0 0 6 0 0 1 2 0 0 2 0 f i g . 2 0 f i g . 2 1 f i g . 2 2 f i g . 2 3 f i g . 2 4 f i g . 2 5
? 20 CXB1577Q s d - e c l " h " l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 1 1 0 0 3 . 3 3 . 6 " h " l e v e l [ m v ] 1 0 6 0 1 0 2 0 9 8 0 9 4 0 9 0 0 8 6 0 s d - e c l s d b - e c l t a = 2 7 c 3 . 1 3 . 4 3 . 2 3 . 5 s d - e c l " l " l e v e l t e m p e r a t u r e t a [ c ] 5 0 1 0 0 s d - e c l s d b - e c l v c c v e e = 3 . 3 v 5 0 0 1 8 8 0 " l " l e v e l [ m v ] 1 8 4 0 1 8 0 0 1 7 6 0 1 7 2 0 1 6 8 0 s d - e c l " l " l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 1 8 8 0 3 . 3 3 . 6 " l " l e v e l [ m v ] 1 8 4 0 1 8 0 0 1 7 6 0 1 7 2 0 1 6 8 0 s d - e c l s d b - e c l t a = 2 7 c 3 . 1 3 . 4 3 . 2 3 . 5 s d - e c l " h " l e v e l t e m p e r a t u r e t a [ c ] 5 0 1 0 0 s d - e c l s d b - e c l v c c v e e = 3 . 3 v 5 0 0 1 1 0 0 " h " l e v e l [ m v ] 1 0 6 0 1 0 2 0 9 8 0 9 4 0 9 0 0 8 6 0 s d - t t l " h " l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 2 . 2 3 . 3 3 . 6 " h " l e v e l [ v ] 2 . 4 2 . 6 2 . 8 3 . 0 3 . 4 t a = 2 7 c 3 . 1 3 . 4 3 . 2 3 . 5 3 . 2 s d - t t l " h " l e v e l t e m p e r a t u r e t a [ c ] 5 0 1 0 0 v c c v e e = 3 . 3 v 5 0 0 2 . 2 " h " l e v e l [ v ] 2 . 4 2 . 6 2 . 8 3 . 0 3 . 4 3 . 2 4 . d c v o l t a g e f i g . 2 6 f i g . 2 7 f i g . 2 8 f i g . 2 9 f i g . 3 0 f i g . 3 1
? 21 CXB1577Q s d - t t l " l " l e v e l t e m p e r a t u r e t a [ c ] 5 0 1 0 0 v c c v e e = 3 . 3 v 5 0 0 2 0 0 " l " l e v e l [ m v ] 2 5 0 3 0 0 3 5 0 4 0 0 s d - t t l " l " l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 2 0 0 3 . 3 3 . 6 " l " l e v e l [ m v ] 2 5 0 3 0 0 3 5 0 4 0 0 t a = 2 7 c 3 . 1 3 . 4 3 . 2 3 . 5 q " h " l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 1 1 0 0 3 . 3 3 . 6 " h " l e v e l [ m v ] 1 0 6 0 1 0 2 0 9 8 0 9 4 0 9 0 0 8 6 0 q - h q b - h t a = 2 7 c 3 . 1 3 . 4 3 . 2 3 . 5 q " h " l e v e l t e m p e r a t u r e t a [ c ] 5 0 1 0 0 q - h q b - h v c c v e e = 3 . 3 v 5 0 0 1 1 0 0 " h " l e v e l [ m v ] 1 0 6 0 1 0 2 0 9 8 0 9 4 0 9 0 0 8 6 0 q " l " l e v e l s u p p l y v o l t a g e v c c v e e [ v ] 3 . 0 1 8 6 0 3 . 3 3 . 6 " l " l e v e l [ m v ] 1 8 2 0 1 7 8 0 1 7 4 0 1 7 0 0 1 6 6 0 q - l q b - l t a = 2 7 c 3 . 1 3 . 4 3 . 2 3 . 5 1 6 2 0 q " l " l e v e l t e m p e r a t u r e t a [ c ] 5 0 1 0 0 q - l q b - l v c c v e e = 3 . 3 v 5 0 0 " l " l e v e l [ m v ] 1 8 6 0 1 8 2 0 1 7 8 0 1 7 4 0 1 7 0 0 1 6 6 0 1 6 2 0 f i g . 3 2 f i g . 3 3 f i g . 3 4 f i g . 3 5 f i g . 3 6 f i g . 3 7
? 22 CXB1577Q s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r / p a l l a d i u m 4 2 / c o p p e r a l l o y p a c k a g e s t r u c t u r e p l a t i n g 0 . 2 g q f p - 4 0 p - l 0 1 q f p 0 4 0 - p - 0 7 0 7 4 0 p i n q f p ( p l a s t i c ) 9 . 0 0 . 4 + 0 . 4 0 . 3 0 . 1 1 1 0 1 1 2 0 2 1 3 0 3 1 4 0 1 . 5 0 . 1 5 + 0 . 3 5 0 . 1 2 7 0 . 0 5 + 0 . 1 ( 8 . 0 ) a a d e t a i l 0 . 1 0 . 1 + 0 . 1 5 + 0 . 1 5 7 . 0 0 . 1 0 . 5 0 . 2 0 . 1 m 0 . 1 2 0 . 6 5 n o t e : p a l l a d i u m p l a t i n g t h i s p r o d u c t u s e s s - p d p p f ( s o n y s p e c . - p a l l a d i u m p r e - p l a t e d l e a d f r a m e ) . package outline unit: mm

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